PEB20321 Datasheet, PDF (273/366 Pages) Siemens Semiconductor Group – Multichannel Network Interface Controller for HDLC MUNICH32X

PEB 20321
PEF 20321
Host Memory Organization
12
Host Memory Organization
12.1
Control and Configuration Block (CCB) in Host Memory
The architecture of the MUNICH32X uses two different Control and Configuration Blocks
in host memory, as illustrated in Figure 79 and Figure 80:
1. related to the serial PCM core (CCB)
2. related to the LBI (LCCB).
Note that each address in CCB/LCCB is DWORD aligned (i.e., the two least significant
address bit fields must be set to ‘0’).
12.1.1 Serial PCM Core CCB
The Figure 29 shows the size of the CCB sections:
Table 29 Sizes of the Control and Configuration Block
Section
Number of DWORDs
Action Specification Command
1
Reserved
2
Time Slot Assignment
32
Channel Specification
128
Current Rx Descriptor Addresses
32
Current Tx Descriptor Addresses
32
The reserved section, located after the Action Specification, maintains backward
compatibility with the MUNICH32, PEB 20320.
Data Sheet
273
2001-02-14