TLE7242-2G Datasheet, PDF (25/50 Pages) Infineon Technologies AG – 4 Channel Fixed Frequency Constant Current Control IC

TLE7242-2G
Functional Description and Electrical Characteristics
5.6
Serial Peripheral Interface (SPI)
SPI messages for the TLE7242 2G IC are 32-bit values broken down into the following fields.
Bit 31: Read/Write Bit - 0 = Read 1 = Write
Bits 30-26: Message Identifier
Bits 25-24: Channel Number (00, 01, 10, 11)
Bits 23-0: Message Data
The message from the microcontroller must be sent MSB first. The data from the SO pin is sent MSB first. The
TLE7242 2G will sample data from the SI pin on the rising edge of SCK and will shift data out of the SO pin on the
rising edge of SCK.
All SPI messages must be exactly 32-bits long, otherwise the SPI message is discarded. The response to an
invalid message (returned in the next SPI message) is the message with identifier 00000 (Manufacturer ID).
When the ENABLE pin is low, all SPI writes commands are executed as read commands.
When RESET_B pin is low, the SPI port is disabled. No SPI messages are received and no responses are sent.
The SO pin remains in a high impedance state.
There is a one message delay in the response to each message (i.e. the response for message N will be returned
during message N+1).
Read/Write operation is referenced from the SPI master. The TLE7242 2G IC is the slave device.
Some messages, such as diagnostic information, do not use the channel number field. In these cases the channel
number is not part of the response.
When bit 31 is = 0 to denote a read operation to the IC, the message data in bits 23-0 of the sent message are
ignored, but will contain valid data in the response message.
All response data (either from a read or write operation) is the direct contents of the addressed internal register,
and is not an echo of the data sent in the previous SPI message.
The response to the first SPI message after a reset is message #0 (IC Version / Manufacturer).
Data Sheet
25
Rev. 1.0, 2008-07-09