TLE7242-2G Datasheet, PDF (16/50 Pages) Infineon Technologies AG – 4 Channel Fixed Frequency Constant Current Control IC

TLE7242-2G
Functional Description and Electrical Characteristics
normal
turn off
time
OUTx
T1
PWM/32 CLK
PHASE_SYNC
gate turns off
on-time cut
short
T1
Programmed delay =
8/32 PWM periods
Figure 10 Phase Synchronization Diagram
The TEST pin is an input pin that is used during IC level test. This pin should be connected directly to ground for
normal device operation.
The FAULT pin is an open drain output pin. This pin will be pulled low by the device when an unmasked fault has
been detected. The fault masks are programmed via SPI message #7.
Electrical Characteristics:
V5D = 4.75V to 5.25V, Vbat = 5.5V to 42V, T_j = -40 °C to +150 °C, all voltages with respect to ground, positive
current flowing into pin (unless otherwise specified)
Pos.
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
Parameter
Logic input low voltage
Logic input high voltage
Logic output low voltage
Logic output high voltage
Pull down digital input (SI, CLK,
SCK, PHASE_SYNC, ENABLE,
TEST)
Pull up digital input (CS_B,
RESET_B)
Symbol
V_ILMAX
V_IHMIN
V_OLMAX
V_OHMIN
I_pd
Limit Values
Min. Typ. Max.
–
–
0.8
2.0
–
–
–
–
0.2
0.8*V_ –
–
SIGNAL
10
–
50
I_pu
-10 –
-50
Fault Pin voltage
V_fault
–
–
0.4
CLK high time (rise 2.0V to fall
t₁₄
2.0V)
CLK low time (fall 0.8V to rise 0.8V) t₁₅
8
–
–
8
–
–
Unit Conditions
V
V
V
I_L=200µA
V
I_L=-200µA
µA
V_in=V_SIGNAL
(current drain to
ground)
µA
V_in=0V (Current
drain from
V_SIGNAL)
V
Active state;
I_fault=2mA
ns
ns
5.3
Diagnostics
The TLE7242 2G includes both on-state and off-state diagnostics. On-state diagnostics are active when the OUTx
pin is driven high and off-state diagnostics are active when the OUTx pin is driven low. A detected fault can be
used to activate the open drain FAULT pin on the IC. This pin can be used to interrupt the microcontroller when a
Data Sheet
16
Rev. 1.0, 2008-07-09