ICE3AR1580VJZ Datasheet, PDF (23/43 Pages) Infineon Technologies AG – Of f -Line SMPS Cur rent Mode Cont rol ler wi th integrated 800V

CoolSET™ F3R80
ICE3AR1580VJZ
Functional Description
Figure 26:
VFB_burst
5V
VCSth_burst
FBB
CFB
RFB
4.5V _C19
500 ^{0.5V C20}
1ms
UVLO during
1^st startup
timer
S9
Control Unit
Entry Burst Mode detection
Comparator _counter
logic
UVLO
SQ
FF4
R
3.7.2.2 Entering Active Burst Mode
The FBB signal is kept monitoring by the comparator C5 (Figure 25). During normal operation, the internal
blanking time counter is reset to 0. When FBB signal falls below V_{FB_burst}, it starts to count. When the counter reaches
20ms and FBB signal is still below V_{FB_burst}, the system enters the Active Burst Mode. This time window prevents a sudden
entering into the Active Burst Mode due to large load jumps.
After entering Active Burst Mode, a burst flag is set and the internal bias is switched off in order to reduce the
current consumption of the IC to about 620µA.
It needs the application to enforce the VCC voltage above the Undervoltage Lockout level of 10.5V such that the
Startup Cell will not be switched on accidentally. Or otherwise the power loss will increase drastically. The
minimum VCC level during Active Burst Mode depends on the load condition and the application. The lowest
VCC level is reached at no load condition.
3.7.2.3 Working in Active Burst Mode
After entering the Active Burst Mode, the FBB voltage rises as V_OUT starts to decrease, which is due to the
inactive PWM section. The comparator C6a monitors the FBB signal. If the voltage level is larger than 3.5V, the
internal circuit will be activated; the Internal Bias circuit resumes and starts to provide switching pulse. In Active
Burst Mode the gate G10 is released and the current limit is reduced to V_{csth_burst} (Figure 3 and Figure 25). In one
hand, it can reduce the conduction loss and the other hand, it can reduce the audible noise. If the load at V_OUT is
still kept unchanged, the FBB signal will drop to 3.2V. At this level the C6b deactivates the internal circuit again
by switching off the Internal Bias. The gate G11 is active again as the burst flag is set after entering Active Burst
Mode. In Active Burst Mode, the FBB voltage is changing like a saw tooth between 3.2V and 3.5V (Figure 27).
3.7.2.4 Leaving Active Burst Mode
The FBB voltage will increase immediately if there is a high load jump. This is observed by the comparator C13
(Figure 25). Since the current limit is reduced to 31%~45% of the maximum current during active burst mode, it
needs a certain load jump to raise the FBB signal to exceed 4.0V. At that time the comparator C5 resets the
Active Burst Mode control which in turn blocks the comparator C12 by the gate G10. The maximum current can
then be resumed to stabilize V_OUT.
Data Sheet
23
V2.0, 2014-01-20