ICE3AR1580VJZ Datasheet, PDF(22/43 Page) Infineon Technologies AG – Of f -Line SMPS Cur rent Mode Cont rol ler wi th integrated 800V

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

ICE3AR1580VJZ Datasheet, PDF (22/43 Pages) Infineon Technologies AG – Of f -Line SMPS Cur rent Mode Cont rol ler wi th integrated 800V

◁

CoolSETâ¢ F3R80

ICE3AR1580VJZ

Functional Description

Vcsth_burst

C12

G10 & FF1

Current Limiting

Burst detect

and adjust

FBB

CFB

VFB_burst C5

C13

4.0V

3.5V

C6a

Internal

Bias

20 ms Blanking

Time

Active Burst

Mode

C6b

3.2V

G11

Control Unit

Figure 25: Active Burst Mode

The Active Burst Mode is located in the Control Unit. Figure 24 shows the related components.

3.7.2.1 Selectable burst entry level

The burst mode entry level can be selected by changing the different capacitor CFB at FBB pin. There are 4 levels to

be selected with different capacitor which are targeted for 10%, 6.67%, 4.38% and 0% of the maximum input power.

At the same time, the exit burst levels are targeted to 20%, 13.3%, 9.6% and 0% of the maximum power accordingly.

The corresponding capacitance range is from 6.8nF to 100pF. The below table is the recommended capacitance

range for the entry and exit level with the CFB capacitor.

CFB

>=6.8nF (5%,X7R)

1nF~2.2nF (1%,COG)

220pF~470pF (1%,COG)

<=100pF (1%,COG)

Entry level

% of Pin_max

VFB_burst

10%

1.60V

6.67%

1.42V

4.38%

1.27V

never

Exit level

% of Pin_max

Vcsth_burst

20%

0.45V

13.3%

0.37V

9.6%

0.31V

always

The selection is at the 1st 1ms of the UVLO âONâ (Vcc > 17V) during the 1st start up but it does not detect in the

subsequent re-start due to auto-restart protection. In case there is protection triggered such as input OVP before

starts up, the detection will be held until the protection is removed. When the Vcc reaches the UVLO âONâ in the 1st

start up, the capacitor CFB at FBB pin is charged by a 5V voltage source through the RFB resistor. When the voltage

at FBB pin hits 4.5V, the FF4 will be set, the switch S9 is turned âONâ and the counter will increase by 1. Then the

CFB is discharged through a 500â¦ resistor. After reaching 0.5V, the FF4 is reset and the switch S9 is turned âOFFâ.

Then the CFB capacitor is charged by the 5V voltage source again until it reaches 4.5V. The process repeats until

the end of 1ms. Then the detection is ended. After that, the total number of count in the counter is compared and

the VFB-burst and the Vcs_burst are selected accordingly (Figure 26)

Data Sheet

V2.0, 2014-01-20

▷