C501 Datasheet, PDF (23/48 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

C501
Table 8
Interrupt Sources and their Corresponding Interrupt Vectors
Source (Request Flags)
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
Vector
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
Vector Address
0003H
000BH
0013H
001BH
0023H
002BH
A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-
priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is
serviced. If requests of the same priority are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority
structure determined by the polling sequence as shown in table 9.
Table 9
Interrupt Priority-Within-Level
Interrupt Source
External Interrupt 0,
Timer 0 Interrupt,
External Interrupt 1,
Timer 1 Interrupt,
Serial Channel,
Timer 2 Interrupt,
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
Priority
High
↓
Low
Semiconductor Group
23
1997-04-01