HYS64D64020GBDL Datasheet, PDF (21/25 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Modules

HYS64D64020GBDL–[5/6/7/8]–B
Small Outline DDR SDRAM Modules
SPD Contents
5
SPD Contents
Table 12 SPD Codes for HYS64D64020GBDL–[5/6/7/8]–B
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Description
Programmed SPD Bytes in E2PROM
Total number of Bytes in E2PROM
Memory Type DDR-I = 07h
# of Row Addresses
# Number of Column Addresses
# of DIMM Banks
Data Width (LSB)
Data Width (MSB)
Interface Voltage Levels
tCK @ CLmax (Byte 18) [ns]
tAC SDRAM @ CLmax (Byte 18) [ns]
DIMM Configuration Type (non- / ECC)
Refresh Rate
Primary SDRAM width
Error Checking SDRAM width
tCCD [cycles]
Burst Length Supported
Number of Banks on SDRAM
CAS Latency
CS Latency
WE (Write) Latency
DIMM Attributes
Component Attributes
tCK @ CLmax -0.5 (Byte 18) [ns]
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
tAC SDRAM @ CLmax -1 [ns]
tRPmin (ns)
Data Sheet
512 MB
× 64
2 Ranks
–5
HEX
80
08
07
0D
0A
02
40
00
04
50
50
00
82
08
00
01
0E
04
1C
01
02
20
C1
60
50
75
50
3C
512 MB
× 64
2 Ranks
–6
HEX
80
08
07
0D
0A
02
40
00
04
60
70
00
82
08
00
01
0E
04
0C
01
02
20
C1
75
70
00
00
48
21
512 MB
× 64
2 Ranks
–7
HEX
80
08
07
0D
0A
02
40
00
04
70
75
00
82
08
00
01
0E
04
0C
01
02
20
C1
75
75
00
00
50
512 MB
× 64
2 Ranks
–8
HEX
80
08
07
0D
0A
02
40
00
04
80
80
00
82
08
00
01
0E
04
0C
01
02
20
C1
A0
80
00
00
50
V1.0, 2003-08