1ED020I12-F Datasheet, PDF (20/22 Pages) Infineon Technologies AG – Single IGBT Driver IC

EICEDRIVER^TM
1ED020I12-F
Application Notes
8
Application Notes
8.1
Reference Layout for Thermal Data
The PCB layout shown in figure 12 represents the reference layout used for the thermal characterisation. Pins 9 and 16
(GND1) and pins 1 and 8 (VEE2) require ground plane connections for achiving maximum power dissipation. The
1ED020I12-F is conceived to dissipate most of the heat generated through this pins.
Output Side
Input Side
PCB + Top-Layer
Total Area = 374.4 mm²
PCB + Bottom-Layer
Figure 10: Reference layout for thermal data (Copper thickness 105µm)
8.2
Printed Circuit Board Guidelines
Following factors should be taken into account for an optimum PCB layout.
- Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
- The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained to increase the
effective isolation and reduce parasitic coupling.
- In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept as short as
possible.
Datasheet
20
Version 2.2, 2009-12-03