IRF60R217 Datasheet, PDF (2/11 Pages) Infineon Technologies AG – Battery powered circuits

IRF60R217
Absolute Maximum Rating
Symbol
I_D @ T_C = 25°C
I_D @ T_C = 100°C
I_DM
P_D @T_C = 25°C
Parameter
Continuous Drain Current, V_GS @ 10V (Silicon Limited)
Continuous Drain Current, V_GS @ 10V (Silicon Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
V_GS
Gate-to-Source Voltage
T_J
Operating Junction and
T_STG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
E_{AS (Thermally limited)} Single Pulse Avalanche Energy 
E_{AS (Thermally limited)} Single Pulse Avalanche Energy 
I_AR
Avalanche Current 
E_AR
Repetitive Avalanche Energy 
Thermal Resistance
Symbol
Parameter
R_JC
Junction-to-Case 
R_JA
Junction-to-Ambient (PCB Mount) 
R_JA
Junction-to-Ambient 
Max.
58
41
217
83
0.56
± 20
-55 to + 175
300
85
124
See Fig 15, 16, 23a, 23b
Typ.
–––
–––
–––
Max.
1.8
50
110
Units
A
W
W/°C
V
°C
mJ
A
mJ
Units
°C/W
Static @ T_J = 25°C (unless otherwise specified)
Symbol
Parameter
V_(BR)DSS
Drain-to-Source Breakdown Voltage
V_(BR)DSS/T_J Breakdown Voltage Temp. Coefficient
R_DS(on)
Static Drain-to-Source On-Resistance
V_GS(th)
Gate Threshold Voltage
I_DSS
Drain-to-Source Leakage Current
I_GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
R_G
Gate Resistance
Min. Typ. Max.
60 ––– –––
––– 0.047 –––
––– 8.0 9.9
––– 10 –––
2.1 ––– 3.7
––– ––– 1.0
––– ––– 150
––– ––– 100
––– ––– -100
––– 2.0 –––
Units
Conditions
V V_GS = 0V, I_D = 250µA
V/°C Reference to 25°C, I_D = 1mA 
m
V_GS = 10V, I_D = 35A 
V_GS = 6.0V, I_D = 18A 
V V_DS = V_GS, I_D = 50µA
µA
V_DS = 60V, V_GS = 0V
V_DS = 60V,V_GS = 0V,T_J =125°C
nA
V_GS = 20V
V_GS = -20V

Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
 Limited by T_Jmax, starting T_J = 25°C, L = 0.14mH, R_G = 50, I_AS = 35A, V_GS =10V.
 I_SD  35A, di/dt  862A/µs, V_DD  V_(BR)DSS, T_J 175°C.
 Pulse width  400µs; duty cycle  2%.
 C_oss eff. (TR) is a fixed capacitance that gives the same charging time as C_oss while V_DS is rising from 0 to 80% V_DSS.
 C_oss eff. (ER) is a fixed capacitance that gives the same energy as C_oss while V_DS is rising from 0 to 80% V_DSS.
 R_ is measured at T_J approximately 90°C.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994.please refer to application note to AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
 Limited by T_Jmax, starting T_J = 25°C, L = 1mH, R_G = 50, I_AS = 16A, V_GS =10V.
2
2016-01-05