AUIRFS4115 Datasheet, PDF (2/10 Pages) Infineon Technologies AG – HEXFET Power MOSFET

AUIRFS/SL4115
Static @ T_J = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V_(BR)DSS
Drain-to-Source Breakdown Voltage
150 ––– ––– V V_GS = 0V, I_D = 250µA
V_(BR)DSS/T_J Breakdown Voltage Temp. Coefficient
––– 0.18 ––– V/°C Reference to 25°C, I_D = 3.5mA
R_DS(on)
Static Drain-to-Source On-Resistance
––– 10.3 12.1 m V_GS = 10V, I_D = 62A 
V_GS(th)
Gate Threshold Voltage
3.0 ––– 5.0
gfs
Forward Trans conductance
97 ––– –––
I_DSS
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250
I_GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
––– ––– 100
––– ––– -100
R_G
Internal Gate Resistance
––– 2.3 –––
Dynamic Electrical Characteristics @ T_J = 25°C (unless otherwise specified)
Q_g
Total Gate Charge
Q_gs
Gate-to-Source Charge
Q_gd
Gate-to-Drain Charge
––– 77 120
––– 28 –––
––– 26 –––
Q_sync
t_d(on)
t_r
t_d(off)
t_f
C_iss
C_oss
Total Gate Charge Sync. (Q_g - Q_gd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
––– 51 –––
––– 18 –––
––– 73 –––
––– 41 –––
––– 39 –––
––– 5270 –––
––– 490 –––
C_rss
Reverse Transfer Capacitance
––– 105 –––
C_{oss eff.(ER)}
Effective Output Capacitance (Energy Related) ––– 460 –––
C_{oss eff.(TR)}
Effective Output Capacitance (Time Related)
––– 530 –––
Diode Characteristics
V V_DS = V_GS, I_D = 250µA
S V_DS = 50V, I_D = 62A
µA
V_DS = 150V, V_GS = 0V
V_DS = 150V,V_GS = 0V,T_J =125°C
nA
V_GS = 20V
V_GS = -20V

I_D = 62A
nC
V_DS = 75V
V_GS = 10V
V_DD = 98V
ns
I_D = 62A
R_G= 2.2
V_GS = 10V
V_GS = 0V
V_DS = 50V
pF ^{ƒ = 1.0MHz, See Fig. 5}
V_GS = 0V, V_DS = 0V to 120V
V_GS = 0V, V_DS = 0V to 120V
Parameter
I_S
Continuous Source Current
(Body Diode)
I_SM
Pulsed Source Current
(Body Diode)
V_SD
Diode Forward Voltage
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_RRM
Reverse Recovery Current
t_on
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 99
––– ––– 396
MOSFET symbol
A
showing the
integral reverse
p-n junction diode.
––– ––– 1.3
––– 86 –––
––– 110 –––
V T_J = 25°C,I_S = 62A,V_GS = 0V 
ns
T_J = 25°C
T_J = 125°C
V_DD = 130V
I_F = 62A,
–––
–––
300
450
–––
–––
nC
T_J = 25°C
T_J = 125°C
di/dt = 100A/µs 
––– 6.5 ––– A T_J = 25°C 
Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
 Limited by T_Jmax, starting T_J = 25°C, L = 0.115mH, R_G = 25, I_AS = 63A, V_GS =10V. Part not recommended for use above this value.
 I_SD 62A, di/dt 1040A/µs, V_DD V_(BR)DSS, T_J  175°C.
 Pulse width 400µs; duty cycle  2%.
 C_oss eff. (TR) is a fixed capacitance that gives the same charging time as C_oss while V_DS is rising from 0 to 80% V_DSS.
 C_oss eff. (ER) is a fixed capacitance that gives the same energy as C_oss while V_DS is rising from 0 to 80% V_DSS.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
 R_ is measured at T_J approximately 90°C.
R_JC value shown is at time zero.
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2015-10-27