HYS64T64020KM Datasheet, PDF (19/31 Pages) Infineon Technologies AG – Double-Data-Rate-Two SDRAM Micro-DIMM

HYS64T[3200/6402]0[H/K/L]M–[3.7/5]–A
Double-Data-Rate-Two SDRAM Micro-DIMM
Preliminary
I_DD Specifications and Conditions
Table 12 I_DD Measurement Conditions¹⁾²⁾ (cont’d)
Parameter
Symbol
Self-Refresh Current
I_DD6
CKE ≤ 0.2 V; external clock off, CK and CK at 0 V; Other control and address inputs are FLOATING,
Data bus inputs are FLOATING. RESET = Low. I_DD6 current values are guaranteed up to T_CASE of 85 °C
max.
All Bank Interleave Read Current
I_DD7
All banks are being interleaved at minimum t_RC without violating t_RRD using a burst length of 4. Control
and address bus inputs are STABLE during DESELECTS. I_out = 0 mA.
1) V_DDQ = 1.8 V ± 0.1 V; V_DD = 1.8 V ± 0.1 V
2) For details and notes see the relevant INFINEON component data sheet
Table 13 I_DD Specification
Product Type
Unit Notes
Organization
256 MB
256 MB
512 MB
512 MB
1 Rank
1 Rank
2 Ranks
2 Ranks
×64
×64
×64
×64
Symbol
Max.
Max.
Max.
Max.
I_DD0
I_DD1
I_DD2P
I_DD2N
I_DD2Q
I_DD3P(0)
I_DD3P(1)
I_DD3N
I_DD4R
I_DD4W
I_DD5B
I_DD5D
I_DD6
I_DD7
280
320
296
336
mA
1)2)
300
360
316
376
mA
1)2)
16
16
32
32
mA
1)3)
128
160
256
320
mA
1)3)
100
120
200
240
mA
1)3)
52
64
104
128
mA
1)3)
20
20
40
40
mA
1)3)
140
160
280
320
mA
1)3)
340
400
356
416
mA
1)2)
360
440
376
456
mA
1)2)
480
520
496
536
mA
1)2)
24
24
40
40
mA
1)3)
16
16
32
32
mA
1)3)
840
880
856
896
mA
1)2)
1) Calculated values from component data. ODT disabled. I_DD1, I_DD4R, and I_DD7 are defined with the outputs disabled.
2) For 2-rank modules only: The other rank is in I_DD2P Precharge Power-Down Standby Current mode
3) For 2-rank modules only: Both ranks are in the same I_DD mode
Data Sheet
19
Rev. 0.6, 2004-06
03242004-2CBE-IJ2X