TLE8104E Datasheet, PDF (18/27 Pages) Infineon Technologies AG – Smart Quad Channel Powertrain Switch

5.5.3 Timing Diagrams
TLE8104E
Smart Quad Channel Powertrain Switch
Electrical and Functional Description of Blocks
CS
SCLK
SI
t_lead
t_pSCLK
t_{SC LK (H )}
t_{SC LK (L)}
t _SU
t_H
t_{v alid}
SO
Figure 13 Serial Interface Timing Diagram
t_lag
t_dt
t_DIS
0.7V_S
0.2V_S
0.7VS
0.2V_S
0.7V_S
0.2V_S
0.7V_S
0.2V_S
5.6
FAULT pin
There is a general fault pin (open drain) which shows a high to low transition as soon as an error occurs for any
one of the four channels. This fault indication can be used to generate a µC interrupt. Therefore a ‘diagnosis’
interrupt routine need only be called after this fault indication.
This saves processor time compared to a cyclic reading of the SO information.
Refer to Figure 9 for the block diagram of the diagnostic functions.
Electrical Characteristics: SPI Interface
V_S = 4.5 V to 5.5 V, T_j = -40 °C to +150 °C, (unless otherwise specified)
all voltages with respect to ground, positive current flowing into pin
Pos. Parameter
Symbol
Limit Values
Min. Typ. Max.
5.6.20 Low level output voltage of pin
V_FAULT(L) 0
–
0.4
FAULT
Unit
V
Conditions
I_FAULT = 1.6 mA
Data Sheet
18
V1.4, 2010-04-26