SAB80C166W Datasheet, PDF (14/67 Pages) Siemens Semiconductor Group – C16x-Family of High-Performance CMOS 16-Bit Microcontrollers

SAB 80C166W/83C166W
The SAB 80C166W/83C166W also provides an excellent mechanism to identify and to process
exceptions or error conditions that arise during run-time, so-called ‘Hardware Traps’. Hardware
traps cause immediate non-maskable system reaction which is similar to a standard interrupt
service (branching to a dedicated vector table location). The occurence of a hardware trap is
additionally signified by an individual bit in the trap flag register (TFR). Except when another higher
prioritized trap service is in progress, a hardware trap will interrupt any actual program execution. In
turn, hardware trap services can normally not be interrupted by standard or PEC interrupts.
The following table shows all of the possible exceptions or error conditions that can arise during run-
time:
Exception Condition
Reset Functions:
Hardware Reset
Software Reset
Watchdog Timer Overflow
Class A Hardware Traps:
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Class B Hardware Traps:
Undefined Opcode
Protected Instruction
Fault
Illegal Word Operand
Access
Illegal Instruction Access
Illegal External Bus
Access
Reserved
Software Traps
TRAP Instruction
Trap
Flag
Trap
Vector
Vector
Location
RESET
RESET
RESET
0000_H
0000_H
0000_H
NMI
STKOF
STKUF
NMITRAP 0008_H
STOTRAP 0010_H
STUTRAP 0018_H
UNDOPC BTRAP
PRTFLT BTRAP
ILLOPA BTRAP
ILLINA
ILLBUS
BTRAP
BTRAP
0028_H
0028_H
0028_H
0028_H
0028_H
[002C_H –
003C_H]
Any
[0000_H –
01FC_H]
in steps
of 04_H
Trap
Number
Trap
Priority
00_H
III
00_H
III
00_H
III
02_H
II
04_H
II
06_H
II
0A_H
I
0A_H
I
0A_H
I
0A_H
I
0A_H
I
[0B_H – 0F_H]
Any
Current
[00_H – 7F_H] CPU
Priority
Semiconductor Group
14