ICE3AR0680JZ Datasheet, PDF (13/34 Pages) Infineon Technologies AG – Of f -Line SMPS Cur rent Mode Cont rol ler wi th integrated 800V

CoolSET^®-F3R80
ICE3AR0680JZ
Functional Description
During power up, when VCC is below the undervoltage
lockout threshold V_VCCoff, the output of the Gate Driver
is set to low in order to disable power transfer to the
secondary side.
activated, the current limiting is reduced to V_{csth_burst}.
This voltage level determines the maximum power
level in Active Burst Mode.
3.6 Current Limiting
PWM Latch
FF1
Propagation-Delay
Compensation
Current Limiting
3.6.1
Leading Edge Blanking
V_Sense
V_csth
t_LEB = 220ns/180ns
PWM-OP
&
G10
Active Burst
Mode
V_{FB_burst}
C5
V_csth
C10
LEB
220ns ^S4
LEB
C12
180ns
V_{CSth_burst}
Propagation-Delay
Compensation-Burst
or
G13
10k
1pF
D1
FBB
CS
Figure 17 Current Limiting Block
There is a cycle by cycle peak current limiting operation
realized by the Current-Limit comparator C10. The
source current of the integrated CoolMOS^® is sensed
via an external sense resistor R_Sense. By means of
R_Sense the source current is transformed to a sense
voltage V_Sense which is fed into the pin CS. If the voltage
V_Sense exceeds the internal threshold voltage V_csth, the
comparator C10 immediately turns off the gate drive by
resetting the PWM Latch FF1.
A Propagation Delay Compensation is added to
support the immediate shut down of the integrated
CoolMOS^® with very short propagation delay. Thus the
influence of the AC input voltage on the maximum
output power can be reduced to minimal. This
compensation applies to both the peak load and burst
mode.
In order to prevent the current limit from distortions
caused by leading edge spikes, a Leading Edge
Blanking (LEB) is integrated in the current sense path
for the comparators C10, C12 and the PWM-OP.
The output of comparator C12 is activated by the Gate
G10 if Active Burst Mode is entered. When it is
t
Figure 18 Leading Edge Blanking
Whenever the integrated CoolMOS^® is switched on, a
leading edge spike is generated due to the primary-
side capacitances and reverse recovery time of the
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked out with a time constant of t_LEB = 220ns for
normal load and t_LEB = 180ns for burst mode.
3.6.2 Propagation Delay Compensation
(patented)
In case of overcurrent detection, there is always
propagation delay to switch off the integrated
CoolMOS^®. An overshoot of the peak current I_peak is
induced to the delay, which depends on the ratio of dI/
dt of the peak current (Figure 19).
I_Sense
I_peak2
I_peak1
I_Limit
Signal2
I_Overshoot2
Signal1
t_{Propagation Delay}
I_Overshoot1
t
Figure 19 Current Limiting
The overshoot of Signal2 is larger than of Signal1 due
to the steeper rising waveform. This change in the
slope is depending on the AC input voltage.
Propagation Delay Compensation is integrated to
Version 2.1a
13
11 Jan 2012