TLE7232GS Datasheet, PDF (12/32 Pages) Infineon Technologies AG – SPI Driver for Enhanced Relay Control

SPI Driver for Enhanced Relay Control
SPIDER - TLE7232GS
Block Description and Electrical Characteristics
5.1.2 Input Circuit
There are three input pins available at SPIDER - TLE7232GS to control the output stages.
IN2
I_IN
IN0
I_IN
channel 2
MAP0_OR OUT0
&
B_gO_aL_t0_e
control
SLE0
MAP2 OUT2 BOL2
SLE2
channel 1
MAP0_OR
&
OUT0
B_gO_aL_te0
control
SLE0
MAP1 OUT1 BOL1
SLE1
channel 0
MAP0_OR OUT0
&
B_gO_aL_t0_e
control
SLE0
MAP0 OUT0 BOL0
SLE0
IN3
I_IN
OR
&
OUT3 BOL3 MAP3
channel 7
channel 6
channel 5
channel 4
channel 3
gate
control
SLE3
InputLogic_GS .emf
Figure 4 Input Mapping and Boolean Operator
The input signal of IN3 can be configured to be used as control signal of the output stages for each channel
separately. The channels 0 to 2 differ from the channels 3 to 7 in the mapping behavior.
IN0 is a direct input to channel Out0, while IN2 is a direct input to Out2.
OUT0 can be switched with the SPI Flag MAP0 to the mappable input IN3, default is IN0.
OUT2 can be switched with the SPI Flag MAP2 to the mappable input IN3, default is IN2.
OUT3 is controlled by default with IN3, but IN3 can be programmed to each channel.
Therefore after power up the inputs are always mapped to their corresponding outputs.
Please refer to Figure 4 for details.
The current sink to ground at the input pins ensures that the channels switch off in case of open pin. The zener
diode protects the input circuit against ESD pulses.
Data Sheet
12
Rev. 1.0, 2007-12-18