PTFB211503EFL Datasheet, PDF (12/14 Pages) Infineon Technologies AG – Thermally-Enhanced High Power RF LDMOS FETs

PTFB211503EL
PTFB211503FL
Package Outline Specifications
Package H-33288-6
4X R1.524
[R.060]
45° X 2.032
[45° X .080]
4X 30°
V
4X 1.143
[.045] (4 PLS)
D
2X 5.080
[.200] (2 PLS)
4.889±.510
V
[.192±.020]
S
9.779
9.398 _[.385]
CL ^[.370]
19.558±.510
[.770±.020]
2X R1.626
[R.064]
E
G
F
CL
2X 12.700
[.500]
2X 22.860
[.900]
27.940
[1.100]
22.352±.200
[.880±.008]
4.039 ^+-.1.22574
[^.159
] ^+.010
-.005
1.575
[.062] (SPH)
1.016
[.040]
CL
34.036
[1.340]
H-33288-6_po_01_10-03-2012
Diagram Notes—unless otherwise specified:
Diag₁r_.am_InN_teo_rt_pe_rs_e—_{t d}u_in_mle_es_ns_sio_ot_nh_ser_aw_nis_de_tos_lp_ee_rc_ai_nfi_ce_ed_s: _{per ASME Y14.5M-1994.}
2. ¹P^. rim^Ina^tery^rpd^reim^{t d}eⁱn^ms^eioⁿn^ss^ioaⁿr^se^am^ndm^t.^oA^lelt^re^arⁿn^ca^et^se^pd^eim^{r A}e^Sns^Mio^En^Ys¹a⁴r^.e^5Min^-c¹h⁹e⁹s⁴.^.
3. ²A^. ll t^Po^rlⁱe^mra^an^ryce^ds^im±^e0ⁿ.^s1ⁱ2^o7^ns[0^a.^r0^e05^m]^mu^.n^Ale^lts^es^rns^ap^te^ec^difⁱi^med^eno^sth^ioeⁿr^sw^ais^re^e.^inches.
4.
5.
3_4LP._.einaA_Psd:l_il_nDtt_hso_:i–l_ce_Akdr_na_=ren_agsc_inase_;t:s_eG0,±_.B1–0₀._=g1_+a2_sto7_0eu.;[_0r._S0_c5e0_1–,5_/–Cs] _0ou_=.un_0rl_d2e_crs_5eas_;imnVs_,mp_–De_[c_V=0i_Df_.i_VD0e_;0Dd_E4Do_,,+t_FhEe_0,–r_.Fw0N0=is.2CeN_/._{.–.C0..001 inch].}
5. Lead thickness: 0.10 + 0.051/–0.025 mm [.004 +0.002/–0.001 inch].
6. Gold plating thickness: 0.25 micron [10 microinch] max.
6. Gold plating thickness: 0.25 micron [10 microinch] max.
Data Sheet
12 of 14
Rev. 04.1, 2016-06-14