ICE3BR2565JF Datasheet, PDF (12/36 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 650V CoolMOS and Startup cell (frequency jitter Mode) in FullPak

CoolSET^®-F3R
ICE3BR2565JF
Functional Description
Within the soft start period, the duty cycle is increasing
from zero to maximum gradually (see Figure 12).
In addition to Start-Up, Soft-Start is also activated at
each restart attempt during Auto Restart.
V_SoftS
V_SOFTS32
t_Soft-Start
3.5
PWM Section
0.75
Oscillator
Duty Cycle
max
Clock
Frequency
Jitter
PWM Section
V_FB
t
4.5V
V_OUT
V_OUT
t_Start-Up
Soft Start
Block
Soft Start
Comparator
t
PWM
Comparator
Current
Limiting
FF1
1S
Gate Driver
G8
RQ
&
G9
CoolMOS^®
Gate
t
Figure 13 Start Up Phase
The Start-Up time t_Start-Up before the converter output
voltage V_OUT is settled, must be shorter than the Soft-
Start Phase t_Soft-Start (see Figure 13).
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS^®, the clamp circuit and the output
overshoot and it helps to prevent saturation of the
transformer during Start-Up.
Figure 14 PWM Section Block
3.5.1
Oscillator
The oscillator generates a fixed frequency of 67KHz
with frequency jittering of ±4% (which is ±2.7KHz) at a
jittering period of 4ms.
A capacitor, a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of D_max=0.75.
Once the Soft Start period is over and when the IC goes
into normal operating mode, the switching frequency of
the clock is varied by the control signal from the Soft
Start block. Then the switching frequency is varied in
range of 67KHz ± 2.7KHz at period of 4ms.
3.5.2
PWM-Latch FF1
The output of the oscillator block provides continuous
pulse to the PWM-Latch which turns on/off the internal
CoolMOS^®. After the PWM-Latch is set, it is reset by
the PWM comparator, the Soft Start comparator or the
Current -Limit comparator. When it is in reset mode, the
output of the driver is shut down immediately.
Version 2.0
12
11 Sep 2008