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XC2261N Datasheet, PDF (109/130 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2261N, XC2263N, XC2264N, XC2265N, XC2268N
XC2000 Family / Value Line
Electrical Parameters
4.7.5 External Bus Timing
The following parameters specify the behavior of the XC226xN bus interface.
Note: These parameters are not subject to production test but verified by design and/or
characterization.
Note: Operating Conditions apply.
Table 30 Parameters
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
CLKOUT Cycle Time1)
t5 CC −
1 / fSYS −
ns
CLKOUT high time
t6 CC 3
−
−
CLKOUT low time
t7 CC 3
−
−
CLKOUT rise time
t8 CC −
−
3
ns
CLKOUT fall time
t9 CC −
−
3
1) The CLKOUT cycle time is influenced by PLL jitter. For longer periods the relative deviation decreases (see
PLL deviation formula).
t5
t6
t7
t9
t8
CLKOUT
MC_X_ EBCCLKOUT
Figure 22 CLKOUT Signal Timing
Note: The term CLKOUT refers to the reference clock output signal which is generated
by selecting fSYS as the source signal for the clock output signal EXTCLK on pin
P2.8 and by enabling the high-speed clock driver on this pin.
Data Sheet
109
V1.3, 2010-04