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ICS87973I-147 Datasheet, PDF (9/19 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS87973I-147
LOW SKEW, 1-TO-12, LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
Parameter Measurement Information
1.65V±5%
VDD,
VDDA,
VDDO
LVCMOS
GND
-1.65V±5%
SCOPE
Qx
VDD
nCLK
V
PP
CLK
GND
Cross Points
V
CMR
LVCMOS Output Load AC Test Circuit
Differential Input Level
V
DDO
V
DDO
V
DDO
QA[0:3],
2
2
2
Qx
QB[0:3],
QC[0:3],
tcycle n
➤
tcycle n+1
➤
QSYNC,
QFB
| | tjit(cc) = tcycle n – tcycle n+1
1000 Cycles
Qy
t sk(o)
Cycle-to-Cycle Jitter
Output Skew
CLK0,
VDD
CLK1
2
VDD
EXT_FB
2
➤t(Ø)
t(Ø) mean = Static Phase Offset
Where t(Ø) is any random sample, and t(Ø) mean is the
average of the sampled cycles measured on controlled edges
LVCMOS Static Phase Offset
nCLK
VDD
nCLK
2
VDD
EXT_FB
2
➤ t (Ø)
t(Ø) mean = Static Phase Offset
Where t(Ø) is any random sample, and t(Ø) mean is the
average of the sampled cycles measured on controlled edges
Differential Static Phase Offset
IDT™ / ICS™ LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
9
ICS87973DYI-147 REV. A DECEMBER 9, 2008