ICS87973I-147 Datasheet, PDF (10/19 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

ICS87973I-147
LOW SKEW, 1-TO-12, LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
Parameter Measurement Information, continued
QA[0:3],
QB[0:3],
QC[0:3],
QSYNC,
QFB
t _PW
V
DDO
2
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Output Duty Cycle/Pulse Width Period
QA[0:3],
2V
QB[0:3],
QC[0:3],
QSYNC, _0.8V
QFB
t_R
Output Rise/Fall Time
2V
0.8V
t_F
Application Information
Recommendations for Unused Input and Output Pins
Inputs:
CLK/nCLK Inputs
For applications not requiring the use of the differential input, both
CLK and nCLK can be left floating. Though not required, but for
additional protection, a 1kΩ resistor can be tied from CLK to
ground.
CLK Inputs
For applications not requiring the use of the clock input, it can be
left floating. Though not required, but for additional protection, a
1kΩ resistor can be tied from the CLK to ground.
LVCMOS Control Pins
All control pins have internal pull-ups; additional resistance is not
required but can be added for additional protection. A 1kΩ resistor
can be used.
Outputs:
LVCMOS Outputs
All unused LVCMOS output can be left floating. There should be no
trace attached.
IDT™ / ICS™ LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
10
ICS87973DYI-147 REV. A DECEMBER 9, 2008