9ZX21501B Datasheet, PDF (9/16 Pages) Integrated Device Technology – 15-Output Differential Zbuffer for PCIe Gen2/3 and QPI

9ZX21501B
15-Output Differential Zbuffer for PCIe Gen2/3 and QPI
Clock Periods - Differential Outputs with Spread Spectrum Disabled
Measurement Window
SSC OFF
DIF
Center
Freq.
MHz
100.00
133.33
1 Clock
1us
0.1s
-c2c jitter
AbsPer
Min
-SSC
Short-Term
Average
Min
- ppm
Long-Term
Average
Min
9.94900
9.99900
7.44925
7.49925
0.1s
0 ppm
Period
Nominal
10.00000
7.50000
0.1s
+ ppm
Long-Term
Average
Max
10.00100
7.50075
1us
+SSC
Short-Term
Average
Max
1 Clock
+c2c jitter
AbsPer
Max
10.05100
7.55075
Units Notes
ns 1,2,3
ns 1,2,4
Clock Periods - Differential Outputs with Spread Spectrum Enabled
Measurement Window
SSC ON
DIF
Center
Freq.
MHz
99.75
133.00
1 Clock
1us
0.1s
-c2c jitter
-SSC
- ppm
AbsPer ^{Short-Term Long-Term}
Min
Average Average
Min
Min
9.94906 9.99906 10.02406
7.44930 7.49930 7.51805
0.1s
0 ppm
Period
Nominal
10.02506
7.51880
0.1s
+ ppm
Long-Term
Average
Max
10.02607
7.51955
1us
+SSC
Short-Term
Average
Max
10.05107
7.53830
1 Clock
+c2c jitter
AbsPer
Max
10.10107
7.58830
Units
ns
ns
Notes:
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK420BQ/CK410B+}
accuracy requirements (+/-100ppm). The 9ZX21501 itself does not contribute to ppm error.
3 _{Driven by SRC output of main clock, 100 MHz PLL Mode or Bypass mode}
4 _{Driven by CPU output of main clock, 133 MHz PLL Mode or Bypass mode}
Notes
1,2,3
1,2,4
Differential Output Termination Table
DIF Zo (^Ω) Iref (^Ω) Rs (^Ω) Rp (^Ω)
100
475 33
50
85
412 27 43.2
9ZX21501 Differential Test Loads
HSCL Output
Buffer
Rs
Differential Zo
Rs
Rp Rp
2pF
2pF
IDT^® 15-Output Differential Zbuffer for PCIe Gen2/3 and QPI
9
1629C - 12/15/11