ICS951702 Datasheet, PDF (8/12 Pages) Integrated Device Technology – PIII™ System Clock Chip for DDR SDRAM

ICS951702
Advance Information
Electrical Characteristics - SDRAMT & C
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%; C_L = 20 pF (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output High Voltage V_OH2B I_OH = -12.0 mA
Output Low Voltage V_OL2B I_OL = 12 mA
Output High Current I_OH2B V_OH = 1.7 V
Output Low Current
I_OL2B V_OL = 0.7 V
Rise Time
t_r2B1
V_OL = 0.4 V, V_OH = 2.0 V
Fall Time
t_f2B1
V_OH = 2.0 V, V_OL = 0.4 V
Duty Cycle
d_t2B1
V_T = 1.25 V
Skew
t_sk2B1 V_T = 1.25 V
Jitter, Cycle-to-cycle
t_jcy
c-c
1
yc2B
V_T = 1.25 V
Jitter, One Sigma
t_j1s2B1 V_T = 1.25 V
1_{Guaranteed by design, not 100% tested in production.}
2
V
0.4 V
-19 mA
19
mA
1.6 ns
1.6 ns
47
53 %
250 ps
250 ps
150 ps
Electrical Characteristics - IOAPIC
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%; C_L = 20 pF (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP
Output High Voltage V_OH4B I_OH = -12 mA
2
Output Low Voltage V_OL4B I_OL = 12 mA
Output High Current I_OH4B V_OH = 1.7 V
Output Low Current
I_OL4B V_OL = 0.7 V
19
Rise Time¹
T_r4B
V_OL = 0.4 V, V_OH = 2.0 V
Fall Time¹
T_f4B
V_OH = 2.0 V, V_OL = 0.4 V
Duty Cycle¹
D_t4B V_T = 1.25 V
45
Jitter, One Sigma¹
T_j1s4B V_T = 1.25 V
Jitter, Absolute¹
T_jabs4B V_T = 1.25 V
-1
1_{Guaranteed by design, not 100% tested in production.}
MAX
0.4
-19
2
2
55
0.5
1
UNITS
V
V
mA
mA
ns
ns
%
ns
ns
0664—07/29/02
8