CSP2510D Datasheet, PDF (8/9 Pages) Integrated Device Technology – 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER

IDTCSP2510D
3.3V PHASE-LOCK LOOP CLOCK DRIVER
TYPICAL CHARACTERISTICS (CONT.)
0°C TO 85°C TEMPERATURE RANGE
55
54
53
52
51
50
49
48
47
46
45
50
Output Duty Cycle vs Clock Frequency
AVDD and VDD = 3.3V
Ta = 25C
66
100
133
166
175
Clock Frequency (MHz)
Jitter vs Clock Frequency
AVDD and VDD = 3.3V
Ta = 25C
140
120
100
80
60
Peak-to-Peak
40
20
Cycle-to-Cycle
0
50
66
100
133
166
175
Clock Frequency (MHz)
8