ICS859S0412I Datasheet, PDF (7/23 Pages) Integrated Device Technology – Maximum output frequency

ICS859S0412I Data Sheet
4:2, DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER
AC Electrical Characteristics
Table 6A. LVPECL AC Characteristics, V_CC = V_{CC_TAP} = 3.3V ± 5%, V_EE = 0V, T_A = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum Typical
f_OUT
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
400
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
100MHz, Integration Range:
12kHz – 20MHz
0.22
tsk(o)
Output Skew; NOTE 2, 3
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
50
46
MUX_ISOLATION MUX Isolation
ƒOUT < 1.2GHz
45
Maximum
3
800
0.28
25
100
245
54
Units
GHz
ps
ps
ps
ps
ps
%
dB
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE: All parameters are measured at f_OUT  1.5GHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential output
crossing point.
NOTE 3: These parameters are guaranteed by characterization. Not tested in production.
NOTE 4: Defined as skew between outputs on different devices operating a the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of input on each device, the output is measured at the differential cross points.
Using the same type of input on each device, the output is measured at the differential cross points.
Table 6B. LVPECL AC Characteristics, V_CC = V_{CC_TAP} = 2.5V ± 5%, V_EE = 0V, T_A = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum Typical
f_OUT
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
400
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
100MHz, Integration Range:
12kHz – 20MHz
0.22
tsk(o)
Output Skew; NOTE 2, 3
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
50
46
MUX_ISOLATION MUX Isolation
ƒOUT < 1.2GHz
45
Maximum
3
800
0.28
25
100
235
54
Units
GHz
ps
ps
ps
ps
ps
%
dB
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE: All parameters are measured at f_OUT  1.5GHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential output
crossing point.
NOTE 3: These parameters are guaranteed by characterization. Not tested in production.
NOTE 4: Defined as skew between outputs on different devices operating a the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of input on each device, the output is measured at the differential cross points.
Using the same type of input on each device, the output is measured at the differential cross points.
ICS859S0412BGI REVISION A MAY 23, 2012
7
©2012 Integrated Device Technology, Inc.