ICS859S0412I Datasheet, PDF (21/23 Pages) Integrated Device Technology – Maximum output frequency

ICS859S0412I Data Sheet
Reliability Information
Table 9. _JA vs. Air Flow Table for a 20 Lead TSSOP
_JA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
87.2°C/W
Transistor Count
The transistor count for ICS859S0412I is: 585
4:2, DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER
1
82.9°C/W
2.5
80.7°C/W
Package Outline and Package Dimensions
Package Outline - G Suffix for 20 Lead TSSOP
Table 10. Package Dimensions
All Dimensions in Millimeters
Symbol Minimum Maximum
N
20
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.60
E
6.40 Basic
E1
4.30
4.50
e
0.65 Basic
L
0.45
0.75

0°
8°
aaa
0.10
Reference Document: JEDEC Publication 95, MO-153
4.40 mm. Body, 0.50 mm. Pitch TSSOP
(173 mil)*
(20mil)*
ICS859S0412BGI REVISION A MAY 23, 2012
21
©2012 Integrated Device Technology, Inc.