ICS9LPRS535 Datasheet, PDF (6/17 Pages) Integrated Device Technology – 48-pin CK505 for Intel Systems

Integrated
Circuit
Systems, Inc.
ICS9LPRS535
Datasheet
Electrical Characteristics - Input/Supply/Common Output DC Parameters
PARAMETER
Ambient Operating Temp
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Low Threshold Input- High Voltage
SYMBOL
Tambient
VDDxxx
VDDxxx_IO
V_IHSE
V_ILSE
V_{IH_FS_TEST}
CONDITIONS
-
Supply Voltage
Low-Voltage Differential I/O Supply
Single-ended 3.3V inputs
Single-ended 3.3V inputs
3.3 V +/-5%
Low Threshold Input- FSC = '1' Voltage VIH_FS_FSC
3.3 V +/-5%
Low Threshold Input- FSA,FSB = '1'
Voltage
Low Threshold Input-Low Voltage
Input Leakage Current
Input Leakage Current
Output High Voltage
Output Low Voltage
Operating Supply Current
iAMT Mode Current
Powerdown Current
Input Frequency
Pin Inductance
Input Capacitance
Clk Stabilization
Tdrive_CR_off
Tdrive_CR_on
Tdrive_CPU
Tfall_SE
Trise_SE
SMBus Voltage
Low-level Output Voltage
Current sinking at V_OLSMB = 0.4 V
SCLK/SDATA
Clock/Data Rise Time
SCLK/SDATA
Clock/Data Fall Time
V_{IH_FS_FSAB}
V_{IL_FS}
I_IN
I_INRES
V_OHSE
V_OLSE
I_DDOP3.3
I_DDOPIO
I_DDiAMT3.3
I_DDiAMTIO
I_DDPD3.3
I_DDPDIO
F_i
L_pin
C_IN
C_OUT
C_INX
T_STAB
T_DRCROFF
T_DRCRON
T_DRSRC
T_FALL
T_RISE
V_DD
V_OLSMB
I_PULLUP
T_RI2C
T_FI2C
3.3 V +/-5%
3.3 V +/-5%
V_IN = V_{DD ,} V_IN = GND
Inputs with pull up or pull down resistors
V_IN = V_{DD ,} V_IN = GND
Single-ended outputs, I_OH = -1mA
Single-ended outputs, I_OL = 1 mA
Full Active, C_L = Full load; Idd 3.3V
Full Active, C_L = Full load; IDD IO
M1 mode, 3.3V Rail
M1 Mode, IO Rail
Power down mode, 3.3V Rail
Power down mode, IO Rail
V_DD = 3.3 V
Logic Inputs
Output pin capacitance
X1 & X2 pins
From VDD Power-Up or de-assertion of PD to 1st
clock
Output stop after CR deasserted
Output run after CR asserted
CPU output enable after
PCI_STOP# de-assertion
Fall/rise time of all 3.3V control inputs from 20-80%
@ I_PULLUP
SMB Data Pin
(Max VIL - 0.15) to
(Min VIH + 0.15)
(Min VIH + 0.15) to
(Max VIL - 0.15)
Maximum SMBus Operating Frequency
F_SMBUS
Spread Spectrum Modulation Frequency fSSMOD
Triangular Modulation
MIN
0
3.135
0.9975
2
V_SS - 0.3
2
MAX UNITS
70
°C
3.465
V
3.465
V
V_DD + 0.3 V
0.8
V
VDD + 0.3 V
Notes
10
3
3
8
0.7
1.5
V
8
0.7
VDD+0.3 V
V_SS - 0.3
0.35
V
-5
5
uA
2
-200
200
uA
2.4
V
1
0.4
V
1
125
mA
50
mA
10
40
mA
10
mA
5
mA
0.1
mA
10
15
MHz
7
nH
1.5
5
pF
6
pF
6
pF
1.8
ms
400
ns
0
us
10
ns
10
ns
10
ns
2.7
5.5
V
0.4
V
4
mA
1000
ns
300
ns
100
kHz
30
33
kHz
NOTES on Input/Supply/Common Output DC Parameters: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
1_{Signal is required to be monotonic in this region.}
2 _{input leakage current does not include inputs with pull-up or pull-down resistors}
3 _{3.3V referenced inputs are: PCI_STOP#, CPU_STOP#, TME, SRC5_EN, ITP_EN, SCLKL, SDATA, TESTMODE, TESTSEL, CKPWRGD and CR# inputs if selected.}
4 _{Intentionally blank}
5 _{Maximum VIH is not to exceed VDD}
6 _{Human Body Model}
7 _{Operation under these conditions is neither implied, nor guaranteed.}
8 _{Frequency Select pins which have tri-level input}
9 _{PCI3/CFG0 is optional}
10 _{If present. Not all parts have this feature.}
1461A—07/28/09
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