ICS840001I-25 Datasheet, PDF (6/12 Pages) Integrated Device Technology – FEMTOCLOCK LVCMOS LVTTL CLOCK GENERATOR

ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V ± 5%
V_DD,
V_DDO
LVCMOS
GND
-1.65V ± 5%
SCOPE
Qx
3.3V OUTPUT LOAD AC TEST CIRCUIT
1.25V ± 5%
V_DD,
V_DDO
LVCMOS
GND
-1.25V ± 5%
SCOPE
Qx
2.5V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
20%
Q
80%
t_R
OUTPUT RISE/FALL TIME
80%
t_F
20%
V
DDO
Q
2
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
IDT^™ / ICS^™ LVCMOS CLOCK GENERATOR
6
ICS840001BGI-25 REV. A MARCH 31, 2009