ICS840001I-25 Datasheet, PDF (2/12 Pages) Integrated Device Technology – FEMTOCLOCK LVCMOS LVTTL CLOCK GENERATOR

ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
2
3, 4, 5
6
V_DD
REF_IN
SEL_0, SEL_1, SEL_2
GND
Power
Input
Input
Power
Pullup
Pullup
Positive supply pin.
Reference input frequency. LVCMOS/LVTTL interface levels.
M and N configuration select pins.
LVCMOS/LVTTL interface levels.
Power supply ground.
7
V_DDO
Power
Output supply pin.
8
Q
Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
15Ω output impedance.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
C_IN
Input Capacitance
C_PD
Power Dissipation Capacitance
R_PULLUP
R_OUT
Input Pullup Resistor
Output Impedance
Test Conditions
V , V = 3.465V
DD DDO
V_DD, V_DDO = 2.625V
Minimum
Typical
4
6
5
51
15
Maximum
Units
pF
pF
pF
kΩ
Ω
IDT^™ / ICS^™ LVCMOS CLOCK GENERATOR
2
ICS840001BGI-25 REV. A MARCH 31, 2009