SSTE32882HLB Datasheet, PDF (55/73 Pages) Integrated Device Technology – Pinout optimizes DDR3 RDIMM PCB layout

SSTE32882HLB
1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT COMMERCIAL TEMPERATURE
Control Word Decoding with QuadCS Mode Disabled
Control Word
None
None
Control word 0
Control word 1
Control word 2
Control word 3
Control word 4
Control word 5
Control word 6
Control word 7
Control word 8
Control word 9
Control word 10
Control word 11
Control word 12
Control word 13
Control word 14
Control word 15
Symbol
n/a
n/a
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
RC8
RC9
RC10
RC11
RC12
RC13
RC14
RC15
DCS0
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
DCS1
X
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Signal
DBA2 DA2
X
X
X
X
L
L
L
L
L
L
L
L
L
H
L
H
L
H
L
H
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
DA1
X
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
DA0
X
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Meaning
No control word access
No control word access
Global Features Control word
Clock Driver Enable Control word
Timing Control word
CA Signals Driver Characteristics Control word
Control Signals Driver Characteristics Control word
CK Driver Characteristics Control word
Reserved, free to use by vendor
Reserved, free to use by vendor
Additional IBT Setting Control Word
Power Saving Settings Control word
Encoding for RDIMM Operating Speed
Encoding for RDIMM Operating V_DD
Reserved for future use
Reserved for future use
Reserved for future use
Reserved for future use
1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT 55
SSTE32882HLB
7201/14