IDT71P71804 Datasheet, PDF (5/23 Pages) Integrated Device Technology – 18Mb Pipelined DDR™II SRAM Burst of 2

IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
18 Mb DDR II SRAM Burst of 2
Pin Configuration IDT71P71804 (1M x 18)
Commercial Temperature Range
1
2
3
4
5
6
7
8
9
10
11
A
CQ
VSS/
SA ⁽²⁾
SA
R/W
BW 1
K
NC
LD
SA
VSS/
SA ⁽¹⁾
CQ
B
NC
DQ9
NC
SA
NC
K
BW 0
SA
NC
NC
DQ8
C
NC
NC
NC
VSS
SA
SA0
SA
VSS
NC
DQ7
NC
D
NC
NC
DQ10
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
DQ11 VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
DQ6
F
NC
DQ12
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
DQ5
G
NC
NC
DQ13 VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
Doff
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
DQ4
NC
K
NC
NC
DQ14 VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
DQ3
L
NC
DQ15
NC
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
DQ2
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
DQ1
NC
N
NC
NC
DQ16
VSS
SA
SA
SA
VSS
NC
NC
NC
P
NC
NC
DQ17
SA
SA
C
SA
SA
NC
NC
DQ0
R
TDO TCK
SA
SA
SA
C
SA
SA
SA
TMS
TDI
165-ball FBGA Pinout
TOP VIEW
6112 tbl 12b
NOTES:
1. A10 is reserved for the 36Mb expansion address. This must be tied or driven to Vss on the 1M x 18 DDRII Burst of 2 (71P71804) devices.
2. A2 is reserved for the 72Mb expansion address. This must be tied or driven to VSS on the 1M x 18 DDRII Burst of 2 (71P71804) devices.
6.542