IDT71P71804 Datasheet, PDF (18/23 Pages) Integrated Device Technology – 18Mb Pipelined DDR™II SRAM Burst of 2

IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
18 Mb DDR II SRAM Burst of 2
Boundary Scan Exit Order (512K x 36-Bit)
ORDER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
PIN ID
6R
6P
6N
7P
7N
7R
8R
8P
9R
11P
9P
10N
10P
11M
9N
9M
11N
11L
10L
9L
10M
11K
9K
9J
10K
11J
9G
11H
10G
10J
11F
10F
9F
11G
11E
9E
6112 tbl 16b
ORDER
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
PIN ID
10D
10E
11C
9D
9C
11D
11B
10B
9B
10C
11A
Internal
9A
8B
7C
6C
8A
7A
7B
6B
6A
5B
5A
4A
5C
4B
3A
1H
1A
3B
1B
1C
2B
3D
2C
1D
6112 tbl 17b
61.482
Commercial Temperature Range
ORDER
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
PIN ID
3C
3E
1E
2E
2D
3F
1F
1G
2F
3G
2J
1J
2G
3K
1K
2K
3J
3L
1L
1M
2L
3N
2M
1N
3M
3P
1P
2P
2N
3R
4R
4P
5P
5N
5R
6112 tbl 18b