ICS2510C Datasheet, PDF (5/7 Pages) Integrated Circuit Systems – 3.3V Phase-Lock Loop Clock Driver

ICS2510C
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
30pF
500Ω
Input
tPD
Output
50% VCC
2V
0.4V
50% VCC
3V
0V
VOH
2V
0.4V
VOL
Figure 1. Load Circuit for Outputs
tR
tF
Notes:
1. C_L includes probe and jig capacitance.
Figure 2. VoltageWaveforms
2. All input pulses are supplied by generators having the following
Propagation Delay Times
characteristics: PRR ≤133 MHz, Z_O = 5 0 Ω , T_r ≤1.2 ns, T_f ≤1.2 ns.
3. The outputs are measured one at a time with one transition per measurement.
CLKIN
FBIN
tPE (PHASE ERROR)
FBOUT
Any
CLKOUT
tSK(o)
Any
CLKOUT
Any
CLKOUT
0010G—09/22/09
tSK(o)
Figure 3. Phase Error and Skew Calculations
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