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ICS2510C Datasheet, PDF (3/7 Pages) Integrated Circuit Systems – 3.3V Phase-Lock Loop Clock Driver
ICS2510C
Absolute Maximum Ratings
Supply Voltage (AVCC) . . . . . . . . . . . . . . . . . AVCC < (Vcc + 0.7V)
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . 4.3 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to Vcc +0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - OUTPUT
TA = 0 - 70°C; VDD = VDDL = 3.3 V +/-10%; CL = 20 - 30 pF; RL = 470 Ohms (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output Impedance
Output Impedance
RDSP
RDSN
VO = VDD*(0.5)
VO = VDD*(0.5)
36
Ω
32
Ω
Output High Voltage
VOH
IOH = -8 mA
2.4 2.9
V
Output Low Voltage
Output High Current
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Cycle to Cycle jitter1
Absolute Jitter1
Skew1
Phase error1
Phase error Jitter1
Delay Input-Output1
VOL
IOH
IOL
Tr
Tf
Dt
Tcyc-cyc
Tjabs
Tsk
Tpe
Tpe3
DR1
IOL = 8 mA
VOH = 2.4 V
VOH = 2.0 V
VOL = 0.8 V
VOL = 0.55 V
VOL = 0.8 V, VOH = 2.0 V
VOH = 2.0 V, VOL = 0.8 V
VT = 1.5 V;CL=30 pF
at 66-100 MHz ; loaded outputs
at 133 MHz ; loaded outputs
10000 cycles; CL = 30 pF
VT = 1.5 V (Window) Output to Output
VT = Vdd/2; CLKIN-FBIN
VT = Vdd/2; CLKIN-FBIN; Delay Jitter
VT = 1.5 V; PLL_EN = 0
0.25 0.4 V
-26 -13.6
mA
-37 -22
19 25
mA
13 17
0.5 1.4 2.1 ns
0.5 1.5 2.7 ns
45 50 55 %
52
100
ps
39 75
57
ps
80 150 ps
-150 40 150 ps
-50 35 50 ps
3.3 3.7 ns
1 Guaranteed by design, not 100% tested in production.
0010G—09/22/09
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