83905-01 Datasheet, PDF (5/20 Pages) Integrated Device Technology – Outputs able to drive 12 series terminated lines

83905-01 DATA SHEET
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Load Capacitance
Test Conditions
Minimum
10
Typical
Fundamental
12
Maximum
40
50
7
18
Units
MHz

pF
pF
AC Electrical Characteristics
Table 6A. AC Characteristics, V_DD = V_DDO = 1.8V ±0.2V, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
Using External Crystal
10
f_MAX
Output
Frequency
Using External Clock
Source NOTE 1
1
tsk(o) Output Skew; NOTE 2, 3
tjit
RMS Phase Jitter (Random); NOTE 4
25MHz, Integration Range:
100Hz – 1MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
300
42
t_EN
Output Enable ^ENABLE1
Time; NOTE 5 _ENABLE2
t_DIS
Output Disable ^ENABLE1
Time; NOTE 5 _ENABLE2
Typical
0.17
50
Maximum
40
100
90
600
58
4
4
4
4
Units
MHz
MHz
ps
ps
ps
%
cycles
cycles
cycles
cycles
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
All parameters measured at ƒ 40MHz using a crystal input unless noted otherwise. Outputs terminated with 50 to V_DDO/2.
NOTE 1: XTAL_IN can be overdriven by an external source.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V_DDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: See phase noise plot.
NOTE 5: These parameters are guaranteed by design. Not tested in production.
REVISION 1 05/01/15
5
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS FANOUT BUFFER