83905-01 Datasheet, PDF (2/20 Pages) Integrated Device Technology – Outputs able to drive 12 series terminated lines

83905-01 DATA SHEET
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
Name
XTAL_OUT
XTAL_IN
ENABLE1, ENABLE2
BCLK0, BCLK1, BCLK2,
BCLK3, BCLK4, BCLK5
GND
V_DD
V_DDO
nc
Type
Output
Input
Input
Output
Power
Power
Power
Unused
Description
Crystal oscillator interface.
Crystal oscillator interface.
Clock enable. LVCMOS/LVTTL interface levels. See Table 3.
Clock outputs. LVCMOS interface levels.
Power supply ground.
Power supply pin.
Output supply pin.
No connect.
Table 2. Pin Characteristics
Symbol Parameter
C_IN
Input Capacitance ENABLE[2:1]
C_PD
Power Dissipation Capacitance
(per output)
R_OUT
Output Impedance
Test Conditions
V_DDO = 2.0V
V_DDO = 1.6V
V_DDO = 1.26V
V_DDO = 1.8V ± 0.2V
V_DDO = 1.5V ± 0.1V
V_DDO = 1.2V ± 5%
Function Table
Table 3. Clock Enable Function Table
Control Inputs
Outputs
ENABLE 1
ENABLE2
BCLK[0:4]
BCLK5
0
0
LOW
LOW
0
1
LOW
Toggling
1
0
Toggling
LOW
1
1
Toggling
Toggling
Minimum
Typical
4
12
12
12
17
18
24
Maximum
Units
pF
pF
pF
pF



BCLK5
BCLK[0:4]
ENABLE2
ENABLE1
Figure 1. Enable Timing Diagram
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS FANOUT BUFFER
2
REVISION 1 05/01/15