71V424S15YGI Datasheet, PDF (5/9 Pages) Integrated Device Technology – 3.3V CMOS Static RAM 4 Meg (512K x 8-Bit)

IDT71V424S/YS, IDT71V424L/YL, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VCC = 3.3V ± 10%, Commercial and Industrial Temperature Ranges)
Symbol
Parameter
READ CYCLE
tRC
Read Cycle Time
tAA
Address Access Time
tACS
Chip Select Access Time
tCLZ⁽¹⁾
Chip Select to Output in Low-Z
tCHZ⁽¹⁾
Chip Deselect to Output in High-Z
tOE
Output Enable to Output Valid
tOLZ⁽¹⁾
Output Enable to Output in Low-Z
tOHZ⁽¹⁾
Output Disable to Output in High-Z
tOH
Output Hold from Address Change
tPU⁽¹⁾
Chip Select to Power Up Time
tPD⁽¹⁾
Chip Deselect to Power Down Time
WRITE CYCLE
tWC
Write Cycle Time
tAW
Address Valid to End of Write
tCW
Chip Select to End of Write
tAS
Address Set-up Time
tWP
Write Pulse Width
tWR
Write Recovery Time
tDW
Data Valid to End of Write
tDH
Data Hold Time
tOW⁽¹⁾
Output Active from End of Write
tWHZ⁽¹⁾
Write Enable to Output in High-Z
71V424S/L10
Min. Max.
71V424S/L12
Min. Max.
10
____
12
____
____
10
____
12
____
10
____
12
4
____
4
____
____
5
____
6
____
5
____
6
0
____
0
____
____
5
____
6
4
____
4
____
0
____
0
____
____
10
____
12
10
____
12
____
8
____
8
____
8
____
8
____
0
____
0
____
8
____
8
____
0
____
0
____
6
____
6
____
0
____
0
____
3
____
3
____
____
6
____
7
NOTE:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
71V424S/L15
Min. Max. Unit
15
____
ns
____
15
ns
____
15
ns
4
____
ns
____
7
ns
____
7
ns
0
____
ns
____
7
ns
4
____
ns
0
____
ns
____
15
ns
15
____
ns
10
____
ns
10
____
ns
0
____
ns
10
____
ns
0
____
ns
7
____
ns
0
____
ns
3
____
ns
____
7
ns
3622 tbl 10
6.452