8T49N285_16 Datasheet, PDF (22/67 Pages) Integrated Device Technology – FemtoClock NG Octal Universal Frequency Translator

8T49N285 Datasheet
Table 6G. GPIO Control Register Bit Field Locations and Descriptions
The values observed on any GPIO pins that are used as general purpose inputs are visible in the GPI[3:0] register that is located at location
0219h near a number of other read-only registers.
Address (Hex)
D7
006E
006F
0070
0071
0072
0073
0074
0075
0076
GPIO Control Register Block Field Locations
D6
D5
D4
D3
D2
D1
D0
Rsvd
GPIO_DIR[3:0]
Rsvd
GPI3SEL[2] GPI2SEL[2] GPI1SEL[2] GPI0SEL[2]
Rsvd
GPI3SEL[1] GPI2SEL[1] GPI1SEL[1] GPI0SEL[1]
Rsvd
GPI3SEL[0] GPI2SEL[0] GPI1SEL[0] GPI0SEL[0]
Rsvd
GPO3SEL[2] GPO2SEL[2] GPO1SEL[2] GPO0SEL[2]
Rsvd
GPO3SEL[1] GPO2SEL[1] GPO1SEL[1] GPO0SEL[1]
Rsvd
GPO3SEL[0] GPO2SEL[0] GPO1SEL[0] GPO0SEL[0]
Rsvd
Rsvd
GPO[3:0]
Bit Field Name
GPIO_DIR[3:0]
GPI0SEL[2:0]
GPI1SEL[2:0]
GPI2SEL[2:0]
GPI3SEL[2:0]
GPO0SEL[2:0]
Field Type
R/W
R/W
R/W
R/W
R/W
R/W
GPIO Control Register Block Field Descriptions
Default Value Description
Direction control for General-Purpose I/O Pins GPIO[3:0]:
00h
0 = input mode
1 = output mode
000b
Function of GPIO[0] pin when set to input mode by GPIO_DIR[0] register bit:
000 = General Purpose Input (value on GPIO[0] pin directly reflected in GPI[0] register bit)
001 = Output Enable control for output Q0
010 = Output Enable control for output Q4
011 = reserved
100 through 111 = reserved
000b
Function of GPIO[1] pin when set to input mode by GPIO_DIR[1] register bit:
000 = General Purpose Input (value on GPIO[1] pin directly reflected in GPI[1] register bit)
001 = Output Enable control for output Q1
010 = Output Enable control for output Q5
011 through 111 = reserved
000b
Function of GPIO[2] pin when set to input mode by GPIO_DIR[2] register bit:
000 = General Purpose Input (value on GPIO[2] pin directly reflected in GPI[2] register bit)
001 = Output Enable control for output Q2
010 = Output Enable control for output Q6
011 = reserved
100 = reserved
101 = CSEL: Manual Clock Select Input
110 through 111 = reserved
000b
Function of GPIO[3] pin when set to input mode by GPIO_DIR[3] register bit:
000 = General Purpose Input (value on GPIO[3] pin directly reflected in GPI[3] register bit)
001 = Output Enable control for output Q3
010 = Output Enable control for output Q7
011 = reserved
100 through 111 = reserved
000b
Function of GPIO[0] pin when set to output mode by GPIO_DIR[0] register bit:
000 = General Purpose Output (value in GPO[0] register bit driven on GPIO[0] pin)
001 = Loss-of-Lock Status Flag for Digital PLL reflected on GPIO[0] pin
010 = reserved
011 = reserved
100 = reserved
101 = reserved
110 through 111 = reserved
©2016 Integrated Device Technology, Inc.
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Revision 5, October 26, 2016