ICS853S012I Datasheet, PDF (2/22 Pages) Integrated Device Technology – Maximum output frequency

ICS853S012I Data Sheet
12-:1, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL CLOCK/DATA MULTIPLEXER
Table 1. Pin Descriptions
Number
1
2
3
4, 5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 20,
21, 22
23
24
25
26
27
28
29
30
31
32
Name
CLK2
nCLK2
V_CC
Q, nQ
V_EE
CLK3
nCLK3
nCLK4
CLK4
nCLK5
CLK5
CLK6
nCLK6
CLK7
nCLK7
nCLK8
CLK8
SEL3, SEL2,
SEL1, SEL0
nCLK9
CLK9
nCLK10
CLK10
nCLK11
CLK11
CLK0
nCLK0
CLK1
nCLK1
Type
Input
Pulldown
Input
Pullup/
Pulldown
Power
Output
Power
Input
Pulldown
Input
Pullup/
Pulldown
Input
Pullup/
Pulldown
Input
Pulldown
Input
Pullup/
Pulldown
Input
Pulldown
Input
Pulldown
Input
Pullup/
Pulldown
Input
Pulldown
Input
Pullup/
Pulldown
Input
Pullup/
Pulldown
Input
Pulldown
Input
Pulldown
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Description
Non-inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Positive supply pin.
Differential output pair. LVPECL interface levels.
Negative supply pin.
Non-inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Non-inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Non-inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Clock select input pins. LVCMOS/LVTTL interface levels.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
Inverting differential clock input.
Inverting differential clock input. V_CC/2 default when left floating.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
ICS853S0121AKI REVISION A SEPTEMBER 28, 2012
2
©2012 Integrated Device Technology, Inc.