844441 Datasheet, PDF (2/15 Pages) Integrated Device Technology – FemtoClock SAS/ SATA Clock Generator

844441 Datasheet
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Name
XTAL_OUT,
XTAL_IN
SSC_SEL0,
SSC_SEL1
F_SEL0
F_SEL1
nPLL_SEL
Q, nQ
GND
V_DD
nc
Type
Input
Description
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Input
Input
Input
Input
Output
Power
Power
Unused
Pulldown SSC select pins. See Table 3A. LVCMOS/LVTTL interface levels.
Pulldown
Pullup
Pulldown
Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
PLL Bypass pin. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVDS interface levels.
Power supply ground.
Power supply pin.
No connect.
NOTE: Pullup/Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
C_IN
R_PULLDOWN
R_PULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
nPLL_SEL, F_SEL[1:0], SSC_SEL[1:0]
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
Function Tables
Table 3A. SSC_SEL[1:0] Function Table
Inputs
SSC_SEL1 SSC_SEL0
Mode
0 (default) 0 (default)
SSC Off
0
1
0.5% Down-spread
1
0
0.23% Down-spread
1
1
0.34% Center-spread
Table 3B. F_SEL[1:0] Function Table
Inputs
F_SEL1
F_SEL0
Output Frequency (MHz)
0
0
75
0
1
100
1 (default) 0 (default)
150
1
1
300
©2016 Integrated Device Technology, Inc.
2
Revison E, November 2, 2016