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842023 Datasheet, PDF (2/15 Pages) Integrated Device Technology – Femtoclock™ Crystal-to-HSTL Clock Generator
842023 DATA SHEET
Table 1. Pin Descriptions
Number
Name
Type
Description
1
VDDA
Power
2
GND
Power
Analog supply pin.
Power supply ground.
3,
4
XTAL_OUT,
XTAL_IN
Input
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
5
OE
Input
Pullup
Output enable pin. When HIGH, Q/nQ outputs are active. When LOW, the
Q/nQ outputs are in a high impedance state. LVCMOS/LVTTL interface levels.
6, 7
nQ, Q
Output
Differential output pair. HSTL interface levels.
8
VDD
Power
Core supply pin.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
CIN
RPULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
k
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VDD
Inputs, VI
Outputs, IO
Continuous Current
Surge Current
Package Thermal Impedance, JA
Storage Temperature, TSTG
Rating
4.6V
-0.5V to VDD + 0.5V
50mA
100mA
129.5C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics, VDD = 3.3V ± 5%, TA = 0°C to 70°C
Symbol
Parameter
Test Conditions
Minimum
VDD
VDDA
IDD
IDDA
Power Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
3.135
VDD – 0.11
Typical
3.3
3.3
Maximum
3.465
VDD
84
11
Units
V
V
mA
mA
FEMTOCLOCK™ CRYSTAL-TO-HSTL CLOCK GENERATOR
2
Rev A 8/14/15