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ICS859S0212I Datasheet, PDF (19/23 Pages) Integrated Device Technology – Propagation delay
ICS859S0212I Data Sheet
2:2, DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the LVPECL output pairs.
LVPECL output driver circuit and termination are shown in Figure 7.
VCC
Q1
VOUT
RL
50Ω
VCC - 2V
Figure 7. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
VCC – 2V.
• For logic high, VOUT = VOH_MAX = VCC_MAX – 0.9V
(VCC_MAX – VOH_MAX) = 0.9V
• For logic low, VOUT = VOL_MAX = VCC_MAX – 1.7V
(VCC_MAX – VOL_MAX) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOH_MAX) = [(2V – (VCC_MAX – VOH_MAX))/RL] * (VCC_MAX – VOH_MAX) =
[(2V – 0.9V)/50] * 0.9V = 19.8mW
Pd_L = [(VOL_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOL_MAX) = [(2V – (VCC_MAX – VOL_MAX))/RL] * (VCC_MAX – VOL_MAX) =
[(2V – 1.7V)/50] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
ICS859S0212BGI REVISION A JUNE 4, 2012
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©2012 Integrated Device Technology, Inc.