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844S012 Datasheet, PDF (18/24 Pages) Integrated Device Technology – Crystal-to-LVDS/LVCMOS Frequency Synthesizer
844S012 Data Sheet
CRYSTAL-TO-LVDS/LVCMOS FREQUENCY SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the 844S012.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 844S012 is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
The maximum current at 85° is as follows:
IDD_MAX = 270mA
IDDA_MAX = 20mA
IDDO_MAX = 1mA
Core and LVDS Output Power Dissipation
• Power (core, LVDS) = VDD_MAX * (IDD + IDDA + IDDO) = 3.465V * (270mA + 20mA + 1mA) = 1008.315mW
LVCMOS Output Power Dissipation
• Dynamic Power Dissipation at 200MHz, (QB, QC)
Power (200MHz) = CPD * Frequency * (VDDO)2 = 4pF * 200MHz * (3.465V)2 = 9.6mW per output
Total Power (200MHz) = 9.6mW * 8 = 76.7mW
• Dynamic Power Dissipation at 25MHz
Power (25MHz) = CPD * Frequency * (VDDO)2 = 4pF * 25MHz * (3.465V)2 = 1.2mW per output
Total Power (25MHz) = 1.2mW * 2 = 2.4mW
Total Power Dissipation
• Total Power
= Power (core, LVDS) + Total Power (200MHz) + Total Power (25MHz)
= 1008.315mW + 76.7mW + 2.4mW
= 1087.415mW
844S012 REVISION B 08/25/15
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