ICS8741004I Datasheet, PDF (14/20 Pages) Integrated Device Technology – DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS™ JITTER ATTENUATOR

ICS8741004I
DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS™ JITTER ATTENUATOR
PRELIMINARY
Schematic Example
Figure 7 shows an example of ICS8741004I application schematic.
In this example, the device is operated at V_DD = V_DDO = 3.3V. Two
examples of LVDS terminations and two examples of HCSL
terminations are shown in this schematic. The input is driven by a
3.3V LVPECL driver. The decoupling capacitors should be located
as close as possible to the power pin.
Logic Control Input Examples
Set Logic
VDD _{Input to}
'1'
RU1
1K
Set Logic
VDD _{Input to}
'0'
RU2
Not Install
To Logic
Input
pins
RD1
Not Install
To Logic
Input
pins
RD2
1K
VDD = 3.3V
R4
10 C2
10uF
C3
0.01u
C4
0.1u
U1
VDDO
QA0
/QA0
MR
BW_SEL
F_SELA
OEA
1
2
3
4
5
6
7
8
9
10
11
12
/QA1
QA1
VDDO
QA0
/QA0
MR
BW_SEL
nc
VDDA
F_SELA
VDD
OEA
ICS8741004I
/QB1
QB1
VDDO
QB0
/QB0
IREF
F_SELB
OEB
GND
GND
/CLK
CLK
24
23
22
21
20
19
18
17
16
15
14
13
QB0
/QB0
F_SELB
OEB
VDDO
/QB1
QB1
R5
475
Zo = 50 Ohm
Zo = 50 Ohm
CLK
nCLK
LVPECL Driv er
R10
R11
50
50
R12
50
(U1:3)VDDO (U1:22)
C5
C6
.1uf .1uf
Figure 7. ICS8741004I Schematic Example
/QA1
QA1
Zo = 50 Ohm
Zo = 50 Ohm
-
R1
100
+
Zo = 50 Ohm
Alternate
LVDS
Termination
QA0
R2
50
+
/QA0
C1
0.1uF
-
R3
Zo = 50 Ohm
50
VDD=3.3V
VDDO=3.3V
R6 33
R7 33
Zo = 50
TL4
Zo = 50
TL6
R8
R9
50
50
-
+
Recommended for
PCI Express Add-In
Card
HCSL Termination
Zo = 50
QB0
+
TL8
/QB0
Zo = 50
-
TL9
R13 R14
50
50
Recommended for PCI
Express Point-to-Point
Connection
IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR
14
ICS8741004BGI REV. B SEPTEMBER 27, 2007