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ICS831721I Datasheet, PDF (14/17 Pages) Integrated Device Technology – Differential Clock/Data Multiplexer
ICS831721I Data Sheet
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 4.
VDD
IOUT = 17mA
DIFFERENTIAL CLOCK/DATA MULTIPLEXER
RREF =
475Ω ± 1%
VOUT
RL
50Ω
IC
Figure 4. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50Ω load to ground.
The highest power dissipation occurs when VDD_MAX.
Power = (VDD_MAX – VOUT) * IOUT,
since VOUT – IOUT * RL
= (VDD_MAX – IOUT * RL) * IOUT
= (3.6V – 17mA * 50Ω) * 17mA
Total Power Dissipation per output pair = 46.8mW
ICS831721AGI REVISION A AUGUST 19, 2011
14
©2011 Integrated Device Technology, Inc.