ICS831721I Datasheet, PDF (12/17 Pages) Integrated Device Technology – Differential Clock/Data Multiplexer

ICS831721I Data Sheet
DIFFERENTIAL CLOCK/DATA MULTIPLEXER
Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, HCSL and other
differential signals. Both signals must meet the V_PP and V_CMR input
requirements. Figures 2A to 2F show interface examples for the
CLK/nCLK input driven by the most common driver types. The input
interfaces suggested here are examples only. Please consult with the
vendor of the driver component to confirm the driver termination
requirements. For example, in Figure 2A, the input termination
applies for IDT open emitter LVHSTL drivers. If you are using an
LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50Ω
Zo = 50Ω
LVHSTL
IDT
LVHSTL Driver
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
3.3V
3.3V
*R3 33Ω
Zo = 50Ω
Zo = 50Ω
*R4 33Ω
HCSL
R1
50Ω
*Optional – R3 and R4 can be 0Ω
CLK
nCLK
R2
50Ω
Differential
Input
Figure 2A. CLK/nCLK Input Driven by an IDT Open
Emitter LVHSTL Driver
Figure 2B. CLK/nCLK Input Driven by a 3.3V HCSL Driver
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
R3
R4
125
125
3.3V
CLK
nCLK
Differential
R1
R2
84
84
Input
Figure 2C. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
R2
50Ω
Figure 2D. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
3.3V
LVDS
Zo = 50Ω
Zo = 50Ω
3.3V
CLK
R1
100
nCLK
Differential
Input
Figure 2E. CLK/nCLK Input Driven by a 3.3V LVDS Driver
ICS831721AGI REVISION A AUGUST 19, 2011
12
©2011 Integrated Device Technology, Inc.