ICS9DB102_10 Datasheet, PDF (13/13 Pages) Integrated Device Technology – Two Output Differential Buffer for PCIe Gen1 & Gen2

ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
Revision History
Rev.
F
G
H
J
K
Originator Issue Date Description
1. Added Phase Noise Parameters, Updated input to output delay values.
2. PLL BW moved to PLL parameters table.
8/6/2007 3. Added terminations tables.
12/14/2007 Updated General SMBus Interface Information.
10/29/2008 Corrected "HCSL" typos.
1. Added I-temp electricals
1/15/2010
2. Changed datasheet title
3. Updated Input Frequency parameter
4. Updated ordering information
RW
4/1/2010 Updated ordering info for Rev B
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: [phone]
For Tech Support
408-284-6578
[e-mail]
Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
[phone] (outside U.S.)
Asia Pacific and Japan
IDT Singapore Pte. Ltd.
1 Kallang Sector #07-01/06
KolamAyer Industrial Park
Singapore 349276
Phone: [phone]
Fax: [phone]
Europe
IDT Europe Limited
321 Kingston Road
Leatherhead, Surrey
KT22 7TU
England
Phone: [phone]
Fax: [phone]
© 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA