ICS844008I-46 Datasheet, PDF (13/15 Pages) Integrated Device Technology – FEMTOCLOCKS CRYSTAL-TO-LVDS CLOCK GENERATOR

ICS844008I-46
FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR
PACKAGE OUTLINE - K SUFFIX FOR 32 LEAD VFQFN
NOTE: The following package mechanical drawing is a generic
drawing that applies to any pin count VFQFN package. This draw-
ing is not intended to convey the actual pin count or pin layout of
this device. The pin count and pinout are shown on the front page.
The package dimensions are in Table 9 below.
TABLE 9. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS (VHHD -2/ -4)
SYMBOL
Minimum
Maximum
N
32
A
0.80
1.0
A1
0
0.05
A3
0.25 Reference
b
0.18
0.30
e
0.50 BASIC
N_D
N_E
D, E
8
8
5.0 BASIC
D2, E2
3.0
3.3
L
0.30
0.50
Reference Document: JEDEC Publication 95, MO-220
IDT^™ / ICS^™ LVDS CLOCK GENERATOR
13
ICS844008AKI-46 REV. A MAY 19, 2008