ICS854104 Datasheet, PDF (12/15 Pages) Integrated Device Technology – Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

ICS854104 Data Sheet
Reliability Information
Table 7. θ_JA vs. Air Flow Table for a 16 Lead TSSOP
θ_JA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
100.3°C/W
Transistor Count
The transistor count for ICS854104 is: 286
Pin compatible with SN65LVDS104
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
1
96.0°C/W
2.5
93.9°C/W
Package Outline and Package Dimensions
Package Outline - G Suffix for 16 Lead TSSOP
Table 8. Package Dimensions
All Dimensions in Millimeters
Symbol Minimum Maximum
N
16
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
4.90
5.10
E
6.40 Basic
E1
4.30
4.50
e
0.65 Basic
L
0.45
0.75
α
0°
8°
aaa
0.10
Reference Document: JEDEC Publication 95, MO-153
ICS854104AG REVISION A AUGUST 14, 2009
12
©2009 Integrated Device Technology, Inc.