ICS83026I-01_10 Datasheet, PDF (11/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

ICS83026I-01
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 3 shows an application schematic example of ICS83026I-
01. The ICS83026I-01 CLK/nCLK input can directly accepts
various types of differential signal. In this example, the input is
driven by an LVDS driver. The ICS83026I-01 outputs are
LVCMOS drivers. In this example, series termination approach
is shown. Additional termination approaches are shown in the
LVCMOS Termination Application Note.
3.3V
LVDS
VDD
R3
1K
Zo = 50 Ohm
R4
100
Zo = 50 Ohm
VDD
1
2
VDD
3
4
CLK
nCLK
OE
C2
0.1u
U1
VD D =3 .3 V
VDDO= 3.3V, 2.5V or 1.8V
VDDO
8
7
Q0
Q1
GND
6
5
VDDO
R1
43
Zo = 50 Ohm
I C S83026I -01
C1
0.1u
Zo = 50 Ohm
R2
43
LVCMOS
LVCMOS
FIGURE 3. ICS83026I-01 SCHEMATIC EXAMPLE
RELIABILITY INFORMATION
TABLE 5A. θ_JAVS. AIR FLOW TABLE FOR 8 LEAD SOIC
θ_JA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
153.3°C/W
112.7°C/W
200
128.5°C/W
103.3°C/W
500
115.5°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE5B. θ_JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θ_JA by Velocity (Linear Feet per Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
0
101.7°C/W
200
90.5°C/W
500
89.8°C/W
TRANSISTOR COUNT
The transistor count for ICS83026I-0I is: 260
83026BMI-01
11
REV. A AUGUST 4, 2010