ICS83026I-01_10 Datasheet, PDF (1/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

ICS83026I-01
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS83026I-01 is a low skew, 1-to-2 Differential-to-
LVCMOS/LVTTL Fanout Buffer. The differential input can
accept most differential signal types (LVPECL, LVDS,
LVHSTL, HCSL and SSTL) and translate to two single-
ended LVCMOS/LVTTL outputs. The small 8-lead SOIC
footprint makes this device ideal for use in applications
with limited board space.
FEATURES
• Two LVCMOS / LVTTL outputs
• Differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
• Maximum output frequency: 350MHz
• Output skew: 15ps (maximum)
• Part-to-part skew: 600ps (maximum)
• Additive phase jitter, RMS: 0.03ps (typical)
• Small 8 lead SOIC package saves board space
• 3.3V core, 3.3V, 2.5V or 1.8V output operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free RoHS
(6) packages
BLOCK DIAGRAM
Q0
CLK
nCLK
Q1
OE
83026BMI-01
PIN ASSIGNMENT
VDD 1
CLK 2
nCLK 3
OE 4
8 VDDO
7 Q0
6 Q1
5 GND
ICS83026I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
VDD 1
CLK 2
nCLK 3
OE 4
8 VDDO
7 Q0
6 Q1
5 GND
ICS83026I-01
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
1
REV. A AUGUST 4, 2010